/*
 * Copyright (c) 2020-2021, SERI Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2022-05-22     Lyons        first version
 */

module pa_fpu_data_unpack (
    single_i,
    src_i,
    rst_sign_o,
    rst_expn_o, //for single, add zero front align to double
    rst_frac_o  //for single, add zero tail align to double
    );

`include "pa_fpu_param.v"

input                           single_i;
input                           src_i;
output                          rst_sign_o;
output                          rst_expn_o;
output                          rst_frac_o;

wire                            single_i;
wire                            double_i;
wire [`FLOAT_WIDTH-1:0]         src_i;
wire                            rst_sign_o;
wire [`EXPN_WIDTH-1:0]          rst_expn_o;
wire [`FRAC_WIDTH-1:0]          rst_frac_o;


wire                            rst_sign_single;
wire                            rst_sign_double;
wire [`EXPN_WIDTH-1:0]          rst_expn_single;
wire [`EXPN_WIDTH-1:0]          rst_expn_double;
wire [`FRAC_WIDTH-1:0]          rst_frac_single;
wire [`FRAC_WIDTH-1:0]          rst_frac_double;


assign double_i = ~single_i;

assign rst_sign_single = src_i[31];
assign rst_sign_double = src_i[63];

assign rst_expn_single[`EXPN_WIDTH-1:0] = {3'b0, src_i[30:23]};
assign rst_expn_double[`EXPN_WIDTH-1:0] = {      src_i[62:52]};

assign rst_frac_single[`FRAC_WIDTH-1:0] = {src_i[22:0], 29'b0};
assign rst_frac_double[`FRAC_WIDTH-1:0] = {src_i[51:0]};

assign rst_sign_o = {single_i & rst_sign_single}
                  | {double_i & rst_sign_double};

assign rst_expn_o[`EXPN_WIDTH-1:0] = {{`EXPN_WIDTH}{single_i}} & rst_expn_single[`EXPN_WIDTH-1:0]
                                   | {{`EXPN_WIDTH}{double_i}} & rst_expn_double[`EXPN_WIDTH-1:0];

assign rst_frac_o[`FRAC_WIDTH-1:0] = {{`FRAC_WIDTH}{single_i}} & rst_frac_single[`FRAC_WIDTH-1:0]
                                   | {{`FRAC_WIDTH}{double_i}} & rst_frac_double[`FRAC_WIDTH-1:0];

endmodule